SPI OLED / LCD displays

Drivers for ST7789, SSD1331, SSD1351, SSD1306 and similar small SPI displays.

Core	Repository	Language	License	FPGA	Used by
lcd_video / spi_display multi-panel SPI LCD driver ★	emard__ulx3s-misc	Verilog, VHDL	BSD (file headers: “AUTHORS=EMARD,MMICKO and…	any	18
bit-bang SPI LCD driver (Apollo 11 FPGA)	mikeakohn__apollo11_fpga	Verilog	MIT (LICENSE, Copyright 2024 Michael Kohn)	iCE40	0
PMOD CharLCD HD44780 driver (debounce + transmit)	fm4dd__pmod-charlcd	Verilog	none found for the RTL	any	0
RasteriCEr SPI display controller	toni3141__rastericer	Verilog	GPL-3.0-or-later	iCE40	0
Silice OLED drivers (ST7789/SSD1351/SSD1331)	sylefeb__silice	Silice	MIT (per-file header, “MIT license, see…	any	0
SlabBoy ST7789 SpinalHDL LCD driver	lawrie__slabboy	SpinalHDL	MIT (LICENSE, Copyright 2018 Craig Bishop)	ECP5	6
SSD1322 OLED framebuffer driver (m68k-ulx3s)	nullobject__m68k-ulx3s	Verilog	none found	ECP5	4

Cores

lcd_video / spi_display multi-panel SPI LCD driver (best)

VGA-clocked-in, SPI-clocked-out display driver; swaps ST7789/SSD1331/SSD1351/SSD1306 panels via a selectable init byte-sequence .mem file, free-running or synced to hsync/vsync/blank.


Repository	emard__ulx3s-misc: ULX3S misc/advanced examples: EMARD’s building-block library
Files	`examples/spi_display/hdl/spi_display_verilog/lcd_video.v`, `examples/spi_display/hdl/spi_display_vhdl/spi_display.vhd`
Top module	`lcd_video`
Language	Verilog, VHDL
License	BSD (file headers: “AUTHORS=EMARD,MMICKO and Lawrie Griffiths / LICENSE=BSD”; VHDL twin “AUTHOR=EMARD / LICENSE=BSD”)
FPGA / primitives	any: none (portable)
Tests	none found

On ULX3S: Pick the matching _linit.mem for your panel/orientation; c_clk_spi_mhz up to 125 MHz for the ST7789 default parameters.

Full review: emard__ulx3s-misc.

Used by 18 other catalogued repos (file copies or module instances found by scan_core_usage.py; heuristic):

cheyao__sega-sms (copies src/spi_display/lcd_video.v)
danodus__ulx3s_68k (instantiates src/test68.v)
danodus__ulx3s_sms (instantiates src/sms.v)
emard__apple2fpga (instantiates rtl_emard/lattice/top/ulx3s_v20_apple2.vhd)
emard__ulx3s_c64 (instantiates rtl/top_ulx3s_v20_c64.vhd)
emard__ulx3s_vic_20 (instantiates src/vic20.v)
lawrie__fpga_pio (instantiates src/top/uart_rx.v)
lawrie__ulx3s_68k (instantiates src/test68.v)
lawrie__ulx3s_amstrad_cpc (instantiates src/top.v)
lawrie__ulx3s_atari_2600 (instantiates src/atari_2600.v)
lawrie__ulx3s_examples (instantiates sdram16/testram.v)
lawrie__ulx3s_gamegear (instantiates src/sms.v)
lawrie__ulx3s_mac128 (instantiates src/mac128.v)
lawrie__ulx3s_ql (instantiates src/ql.v)
lawrie__ulx3s_sms (instantiates src/sms.v)
… and 3 more (see data/core_usage.json)

bit-bang SPI LCD driver (Apollo 11 FPGA)

Small bit-banged SPI LCD driver, plain Verilog with no vendor primitives; built for an iCE40 HX8K AGC (Apollo Guidance Computer) replica board.


Repository	mikeakohn__apollo11_fpga: Apollo Guidance Computer CPU reimplementation for iceFUN
Files	`src/display_spi.v`
Top module	`display_spi`
Language	Verilog
License	MIT (LICENSE, Copyright 2024 Michael Kohn)
FPGA / primitives	iCE40: none (portable)
Tests	none found

On ULX3S: No porting needed for the SPI logic itself; only clock/reset wiring needs adapting to ULX3S.

PMOD CharLCD HD44780 driver (debounce + transmit)

Small state-machine driver that sends 8-bit command/char bytes to an HD44780-compatible character LCD over a parallel PMOD bus (8 data lines + EN/RS/RW), with button-debounce demo logic.


Repository	fm4dd__pmod-charlcd: CharLCD PMOD: HD44780 character-LCD PMOD hardware
Files	`examples/ulx3s/display/display.v`, `examples/ulx3s/display/lcd_transmit.v`, `examples/ulx3s/display/debounce.v`
Top module	`display`
Language	Verilog
License	none found for the RTL (repo LICENSE is CERN-OHL v1.2 and explicitly states it ‘does not extend to software, firmware, or code’)
FPGA / primitives	any: none (portable)
Tests	none found (no _tb.v for the ulx3s/icebreaker display example in this clone; icebreaker Makefile’s `test` target references a missing testbench)

On ULX3S: Not SPI - this is a parallel HD44780 interface (matches the pmod-charlcd hardware’s PMOD wiring), reused verbatim from the same repo’s IceBreaker/GateMate examples; ulx3s.lpf present, no vendor primitives, portable as-is.

RasteriCEr SPI display controller

Streams a rasterizer’s pixel output to a small SPI LCD via a generic SPI-slave-to-parallel bridge (SPI_Slave.v) feeding DisplayControllerSpi.v; built for an iCE40 UP5K board but neither file instantiates vendor primitives.


Repository	toni3141__rastericer: iCE40 UP5K
Files	`rtl/Display/DisplayControllerSpi.v`, `rtl/3rdParty/SPI_Slave.v`
Top module	`DisplayControllerSpi`
Language	Verilog
License	GPL-3.0-or-later (LICENSE, repo root; per-file headers confirm GPLv3-or-later, Copyright 2021 ToNi3141)
FPGA / primitives	iCE40: none (portable)
Tests	none found

On ULX3S: Portable logic; verify clock-domain assumptions before reuse on ECP5.

Silice OLED drivers (ST7789/SSD1351/SSD1331)

Silice algorithm oled(...) SPI display drivers for three common OLED controllers, part of Silice’s ULX3S board framework and used across several Silice projects (oled_test, oled_sdcard_test, doomchip).


Repository	sylefeb__silice: Silice HDL language/compiler + many ULX3S projects
Files	`projects/common/oled_st7789.si`, `projects/common/oled_ssd1351.si`, `projects/common/oled_ssd1331.si`
Top module	`oled`
Language	Silice
License	MIT (per-file header, “MIT license, see LICENSE_MIT in Silice repo root”)
FPGA / primitives	any: none (portable)
Tests	none found

On ULX3S: Requires the Silice compiler (compiles to Verilog); proven on ULX3S via Silice’s own board support.

Full review: sylefeb__silice.

SlabBoy ST7789 SpinalHDL LCD driver

SpinalHDL SPI driver component for an ST7789 LCD, part of the SlabBoy Game Boy core (idcode 12F, ULX3S-class ECP5 board).


Repository	lawrie__slabboy: SlabBoy: Game Boy in SpinalHDL on ST7789/SSD1331
Files	`src/main/scala/slabboy/ST7789.scala`
Top module	`ST7789`
Language	SpinalHDL (Scala)
License	MIT (LICENSE, Copyright 2018 Craig Bishop)
FPGA / primitives	ECP5: none (portable)
Tests	none found

On ULX3S: Requires the SpinalHDL/Scala toolchain to elaborate to Verilog; check its bus/register interface against your design.

Used by 6 other catalogued repos (file copies or module instances found by scan_core_usage.py; heuristic):

emard__st7789py_mpy (instantiates st7789py.py)
emard__ulx3s-misc (instantiates examples/lcd_st7789/micropython/st7789_240x240/esp32/st7789py.py)
emard__ulx3s_vic_20 (instantiates src/vic20.v)
lawrie__spinalulx3s (instantiates src/main/scala/mylib/ST7789.scala)
lawrie__ulx3s-nmigen-examples (instantiates image/st7789.py)
lawrie__ulx4m_amaranth_examples (instantiates st7789/gamepi15.py)

SSD1322 OLED framebuffer driver (m68k-ulx3s)

SSD1322 grayscale OLED driver: on reset runs the panel init sequence, then continually copies the framebuffer to the display via a small SPI-like tx sub-module (oled_tx).


Repository	nullobject__m68k-ulx3s: Motorola 68000 SoC on ULX3S using the fx68k core, with OLED display, framebuffer/GPU and ACIA serial
Files	`hdl/oled.v`
Top module	`oled`
Language	Verilog
License	none found (no repo-level LICENSE; only the vendored lib/fx68k CPU core has its own separate LICENSE)
FPGA / primitives	ECP5: none (portable)
Tests	none found

On ULX3S: Proven on ULX3S 85F (Makefile DEVICE=85k); targets SSD1322 rather than ST7789/SSDxxx1/1331 — adapt init bytes for other panels.

Used by 4 other catalogued repos (file copies or module instances found by scan_core_usage.py; heuristic):

brunolevy__learn-fpga (copies Basic/ICESTICK/Oled/oled.v)
nullobject__riscv-ulx3s (copies hdl/oled.v)
nusgreyhats__greybadge25 (copies firmware/ecp5/tests/pmod_oled_test/src/oled/oled.v)
osresearch__up5k (copies oled.v)

Other catalogued projects

Catalogued repos tagged oled-lcd (47) are listed in the full catalogue.