iCE40-HX8K Breakout

Lattice’s HX8K evaluation board, target of many IceStorm-era examples.

   
Board Lattice iCE40-HX8K Breakout Board
FPGA iCE40 HX8K, CT256
Evidence catalogue rows (nesl__ice40_examples, msinger__iceboy)
Clock 12 MHz (catalogue notes)
Catalogued repos 7

The description is a short summary; FPGA facts come from the catalogue rows cited above.

Constraint files (PCF)

PCF Repository
tutorial/ICE40-HX8K_Breakout_Board/T02-Fport/Fport.pcf obijuan__open-fpga-verilog-tutorial
tutorial/ICE40-HX8K_Breakout_Board/T04-counter/counter.pcf obijuan__open-fpga-verilog-tutorial
tutorial/ICE40-HX8K_Breakout_Board/T05-prescaler/prescaler.pcf obijuan__open-fpga-verilog-tutorial
tutorial/ICE40-HX8K_Breakout_Board/T03-inv/inv.pcf obijuan__open-fpga-verilog-tutorial
tutorial/ICE40-HX8K_Breakout_Board/T01-setbit/T01-setbit.pcf obijuan__open-fpga-verilog-tutorial

Reusable cores seen on this board

Cores whose source repo, or a repo that copies/instantiates them, targets this board.

Core Function Source repo
PicoRV32 RISC-V core cpu-riscv yosyshq__picorv32
Amaranth radix-2 fixed-point FFT (FFT/Butterfly/TwiddleFactors) dsp greatscottgadgets__amalthea
alhusseingamal/r2sdf-fft radix-2 DIF SDF streaming FFT dsp alhusseingamal__r2sdf-fft
mattvenn/fpga-sdft sliding DFT core dsp mattvenn__fpga-sdft
vga2dvid + tmds_encoder DVI/TMDS core (Mike Field / EMARD) hdmi-dvi emard__ulx3s-misc
spimemio SPI/QSPI flash XIP controller spi-flash yosyshq__picorv32
VgaSyncGen SpinalHDL VGA timing generator vga thorkn__vga_clock_1

Projects targeting this board


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Generated from the JSON in data/ by the scripts in .claude/skills. Facts cite the upstream file at the reviewed commit; verify before reuse.

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